A realisation of Fault tolerant ALU-with TMR method

• Jaimini Patel
• Deepali H. Shah

Fault Tolerant, ALU, TMR(triple modular redundancy), FPGA, Xilinx ISE

This paper represents the fault tolerant ALU with Triple modular redundancy on FPGA. TMR technique is mitigating the single error upsets of the module. TMR method gives fault tolerant result but with penalty of area. TMR technique is used in aviation application and space application where radiation effects are takes place.

Published

 Vol. 2 Issue. 3 Pages. 3161-3164

Jaimini Patel, Deepali H. Shah. "A realisation of Fault tolerant ALU-with TMR method".INTERNATIONAL JOURNAL OF ENGINEERING DEVELOPMENT AND RESEARCH ISSN:2321-9939, Vol.2, Issue 3, pp.3161-3164, URL :https://rjwave.org/ijedr/papers/IJEDR1403057.pdf

Volume 2 Issue 3 

Pages. 3161-3164

Published Paper PDF : https://rjwave.org/ijedr/papers/IJEDR1403057.pdf

Published Paper URL : https://openrgate.org/viewfulldetails.php?id=889

This work is licensed under a Creative Commons Attribution 4.0 International License and The Open Definition