Paper Title

Design of Efficient FIR filter with EDBNS multiplier using Transpose method for various Applications

Authors

  • L. Durga Prasad
  • J.E.N.Abhilash
  • B.Subrahmaneswara Rao

Keywords

Transpose form, Block formulation, Reconfigurable, Multiple Constant multiplication, extended double base number system, power delay product (PDP), area delay product (ADP).

Abstract

In FIR Filter Realization, Transpose form FIR filters are naturally pipelined and support multiple constant multiplication (MCM) technique that results in major saving of computation. By including block formulation method in transpose form data samples in fixed size blocks are processed one after the other which results in processing more number of samples in parallel. This project is mainly replacing the general multiplier present in existing transpose form fixed and reconfigurable filter architectures with EDBNS multiplier for better performance. Due to its scarcity and instinctive abstraction of the sum of binary shifted partial products, the sharing of adders in the time-multiplexed multiple constant multiplication blocks of the programmable FIR filters can be maximized by a direct mapping from the quasi-minimum EDBNS. The multiplexing cost can be further reduced by inclusion double base terms. The shifting operation delay has been reduced by using barrel shifters. The architectures have been simulated and synthesized on vertexE using VHDL which results in 4% reduction in PDP and 56.7% reduction in ADP.

Article Type

Published

How To Cite

L. Durga Prasad, J.E.N.Abhilash, B.Subrahmaneswara Rao. "Design of Efficient FIR filter with EDBNS multiplier using Transpose method for various Applications".INTERNATIONAL JOURNAL OF ENGINEERING DEVELOPMENT AND RESEARCH ISSN:2321-9939, Vol.5, Issue 4, pp.1182-1190, URL :https://rjwave.org/ijedr/papers/IJEDR1704193.pdf

Issue

Volume 5 Issue 4 

Pages. 1182-1190

Article Preview