Paper Title

Comparative Performance Analysis of XOR - XNOR Function Based High - Speed CMOS Full Adder Circuits

Authors

  • YALAGALA BHAVANI PRASAD

Keywords

XOR, Full adders, XNOR, PTL, XOR-XNOR

Abstract

this papers presents the realization of full adder designs using Complimentary CMOS Design, Complimentary Pass Transistor Logic Design and XOR-XNOR Design in a single unit. The main motive of this paper is to determine the comparative study of power, delay, power delay product (PDP) of different Full adder designs using CMOS Logic Styles. Simulations results clearly determines that XORXNOR type Full adder Design is better compared to Complimentary CMOS style and Pass Transistor Design with respect to power, delay .Power Delay Product Comparison .The power delay product is also important parameter to determines the performance of the design. The XOR-XNOR implementation provides better performance and requires less number of transistors compared to other full adder designs. The implementation of design using GPDK 180nm with supply voltage of 1.8 V in Cadence Virtuoso Schematic Composer and simulations done by using Spectre Environment

Article Type

Published

How To Cite

YALAGALA BHAVANI PRASAD. "Comparative Performance Analysis of XOR - XNOR Function Based High - Speed CMOS Full Adder Circuits".INTERNATIONAL JOURNAL OF ENGINEERING DEVELOPMENT AND RESEARCH ISSN:2321-9939, Vol.1, Issue 3, pp.39 - 45, URL :https://rjwave.org/ijedr/papers/IJEDR1303009.pdf

Issue

Volume 1 Issue 3 

Pages. 39 - 45

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